D-Link Ethernet switch LED kludge


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The following information is provided 'as-is' with absolutely no warranty, expressed or implied. I (David Stafford) shall not be held responsible for ANY consequences of the use or misuse of this information. In particular, I am not responsible for errors, or damage resulting from errors in this information, even if I am aware of such errors. In other words, I if you build this and if fries your computer, I'm not responsible. Period. By using this information you agree to this. If you cannot agree to this, you may not use the information in this document and must leave now.

My most recent project is a link between my D-Link DSS-8+ Fast Ethernet 10/100 Switch and my PC. The Switch has a 1.5Mb/s serial link that it uses to transfer the LED status to a PGA which controls the LEDs. I reverse engineered the interface and developed a circuit to allow Kaylex to read the LED status.

The Ethernet switch actually supports 40 LEDs: Link/activity, speed, duplex, and collision for each port. And another set of 8 LEDs for bandwidth utilization. Only 24 of these are present on the switch. (the bandwidth, and collision LEDs are not present.)

My circuit simply reads the serial data into a 40 bit shift register made with five 74LS299 ICs and then allows the computer to read any of the five 8 bit banks. There is also circuitry for LED outputs and input detect circuits to detect the presents of the D-Link switch.

My circuit interfaces with the computer using a Sealevel Systems 24 port DIO card. Although, it should be possible to interface it to a PC using the parallel port. By hardwiring the input lines, it can display the status in the LEDs without connecting to a computer

Inputs: A0 through A2 select which of the five shift registers should be buffered to the parallel output ports. A single bus is shared between the outputs of the shift registers, the output buffer, and the LED latch. When the LED Latch input is asserted, the current data on the bus is clocked into the LED registers, causing the LEDs to hold their current state. This can be used to prevent LED flicker when the computer reads the banks. Data in and Clock in are the two inputs from the Ethernet switch.

Outputs:
Address Function
0 Collision
1 Full duplex
2 Fast
3 Link / activity
4 Bandwidth usage
5 Unused
6 Status
7 Unused
The status port can be used to determine if the switch is connected and if data is currently being clocked into the circuit. When data is being clocked into the circuit, ports 0 through 4 will have unpredictable values. the 7th bit (0x40) which is the output of the 555 timer becomes high several ns after the board becomes busy and remains high until several us after it is no longer busy. The 8th bit (0x80) is buffered from the clock input.

Using the software: I have a Linux X11 program which fetches the values from the card and displays them in a window. Unless your configuration is very similar to mine, this software will not work on your computer without modification.

Unless you happen to use a Sealevel Systems 8008 24bit Digital IO card you will have to rewrite io.c for your IO controller. If you _DO_ happen to use the the Sealevel Systems IO card, you need to make a file called "/etc/dio.run" with two integers. The first integer is the address of the card, and the second integer is the value of the control register (0 will work, of no other devices are using the card).

Front ends: I have two front ends. simple_frontend.c is a simple fronted which grabs the values of the 8 ports and writes them to stdout. frontend.c is a more complex fronted that uses X11. It also compiles sensors.c which contains code to read the temperature from certain SCSI hard drives and from the lmsensors kernel subsystem. It's most likely useless on your computer and will not be integrated by default (see config.h).

Building: Before doing anything run "make depend". Run "make" to build the version based on frontend.c (it will be called sw). Run "make simple" to build the simple text-only version (it will be called sw-text).

Software
Hardware Schematic
Pictures: 1 2
Screenshot


dstaff(at)ugcs.caltech.edu